München - RF Circuit Design PLL

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In this position you will be responsible for: Development of state-of-the-art circuit blocks for digital phase-locked loops (DPLL) for mobile communication RF transceivers in latest CMOS technologies. + Observance of the specification under consideration of testability and tolerances of the production. + Dimensioning and verification of the circuit blocks with use of the IMC development tools. + Check of the generated layout for rf-suitability. + Introduction and support of the test engineer for the test concept. + Circuit and circuit block evaluation with RF lab test equipment. + Error analysis, redesign and optimization. + Design-in support for the customer (if necessary). + Transfer of the circuit to the fab and observation of the production yield during the ramp-up phase, analysis of production yield problems and correction with redesign (if necessary).  Qualifications  Bachelor or Master of Science degree in electrical engineering Specific knowledge: - minimum 5 years experience in integrated circuit design of phase-locked loops (PLL) in CMOS technologies - Profound knowledge in development tools (Cadence) and software development - Profound knowledge in VHDL behavior modeling and digital circuit simulation - Profound knowledge in RF floor planning and power supply concept ...

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